The present invention relates to a semiconductor device such as high electron mobility transistor and a process for production thereof. This semiconductor device has more than one semiconductor layer of laminate structure therein that permit high speed charge transit.
The recent mobile communication system requires its terminals, such as portable telephones, to have smaller size and less power consumption than before. The same requirement as above is imposed also on devices (such as transistors) constituting each terminal. For example, the power amplifier for digital cellular phones supporting the present-day mobile communication is required to operate efficiently at a low voltage with a single positive power supply.
Among devices in practical use as a power amplifier are the high electron mobility transistor (HEMT) and the pseudomorphic HEMT (PHEMT). The latter is characterized by its epitaxial structure with some intentional lattice mismatches for much higher electron mobility. They are designed to perform current modulation by using the heterojunction structure.
The above-mentioned PHEMT has a structure as shown in section in FIG. 4. It is composed of a semi-insulating substrate 31 of single crystal GaAs, a buffer layer 32 of GaAs not doped with impurity, a first barrier layer 33 of AlGaAs, a channel layer 34 of InGaAs, and a second barrier layer 35 of AlGaAs, which are formed on top of the other. The barrier layer 33 is composed of a carrier supply layer 33a containing an impurity of a first conduction type (e.g., n-type) and high-resistance layers 33b and 33c. Similarly, the barrier layer 35 is composed of a carrier supply layer 35a and high-resistance layers 35b and 35c. 
On the second barrier layer 35 are arranged an n-type GaAs layer 36 containing an n-type impurity and an insulting layer 37.
Openings forms in the insulating film 37. A source electrode 39a and a drain electrode 39b form in each of the openings, with an n-type GaAs layer 36 placed thereunder. A gate electrode 38 forms in another opening in the insulating film 37. This structure permits the current flowing from the source electrode 39a to the drain electrode 39b to change in response to the voltage applied to the gate electrode 38.
The above-mentioned PHEMT usually has the recessed structure in which the second barrier layer 35 is made thin under the gate electrode. In this case, the channel layer just below it has a region in which carriers are depleted or there are less carriers than in the channel layer of other structure.
The thus structured PHEMT is characterized by its ability to accumulate carriers in the channel layer 34 upon application of positive voltage to the gate electrode 38. In principle, it is superior to MES-FET (Metal Semiconductor FET) in linearity of mutual conductance (Gm) versus gate voltage (Vg). This feature is greatly advantageous to improvement in efficiency of power amplifiers.
One of the transistors capable of operating with a single positive power supply is the junction field effect transistor (JFET) in which the semiconductor just below the gate electrode is doped with an impurity of a second conduction type (say, p-type) such that the built-in potential (φbi) increases between the semiconductor of a first conduction type forming the channel layer and the semiconductor of a second conduction type just below the gate electrode.
Doping with an impurity of a second conduction type is not an only way of increasing the built-in potential. The same object is achieved by forming the layer just below the gate electrode from a semiconductor having a larger bandgap than that used for the channel layer. The PHEMT shown in FIG. 4 is based on this technology.
The combination of the advantages of JFET and PHEMT gives a junction PHEMT (JPHEMT), whose structure is shown in FIG. 5.
The JPHEMT shown in FIG. 5 includes a substrate 41 of semi-insulating single-crystal GaAs, a buffer layer 42 of undoped GaAs, a first barrier layer 43 of AlGaAs, a channel layer 44 of InGaAs, and a second barrier layer 45 of AlGaAs, which are sequentially arranged on top of the other.
The barrier layer 43 includes a carrier supply layer 43a containing an impurity of a first conduction type (n-type) and high-resistance layers 43b and 43c. Similarly, the barrier layer 45 includes a carrier supply layer 45a and high-resistance layers 45b and 45c. 
On the second barrier layer 45 is arranged an insulating film 47 having openings. Two of these openings form a source electrode 49a and a drain electrode 49b. Another opening in the insulating film 47 forms a gate electrode 48. A gate impurity region 50 forms in the second barrier layer 45 just below the gate electrode 48. The gate impurity region 50 is an impurity (Zn) of a second conduction type (p-type). The above mentioned JPHEMT also has a structure that permits the current flowing from the source electrode 49a to the drain electrode 49b to change in response to the voltage applied to the gate electrode 48.
The JPHEMT constructed as mentioned above is characterized in that the smaller is the distance (d) between the gate impurity region 50 and the channel layer 44, the greater is the built-in potential (φbi) between the semiconductor constituting the channel layer 44 and the gate impurity region 50 just below the gate electrode. This allows the JPHEMT to operate only with a single positive power supply.
Unfortunately, the JPHEMT shown in FIG. 5 has a drawback as follows. In the case where the second barrier layer 45 is formed from AlGaAs and the region just below the gate electrode is doped with an impurity (Zn) of a second conduction type (p-type) by vapor phase diffusion, Zn diffuses rapidly in the AlGaAs layer on account of its large diffusion coefficient. Therefore, even though the amount of Zn is small, diffusion takes place such that the bottom of the Zn diffusion region extends to the depth, witch is a distance (d), away from the channel layer 44. The result is that the impurity (Zn) of a second conduction type in the uppermost layer of the second barrier layer 45 forms from AlGaAs has a concentration which is about one half that in the case where the second barrier layer 45 is formed from GaAs. This low concentration leads to a poor ohmic contact, which in turn results in a high gate resistance unfavorable to the gain of power amplifiers.
As mentioned above, for the JPHEMT to have a large value of φbi and to operate with a single positive power supply, it is necessary to form the second barrier layer 45 from a semiconductor (such as AlGaAs) having a large bandgap. In addition, for the gate electrode to have a good ohmic contact, it is necessary to increase the concentration of the impurity of a second conduction type in the outermost surface of the second barrier layer 45.